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Computer Organization and Architecture MCQs with Answers - Set III

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 Computer Organization and Architecture MCQs with Answers

Set III


Q1. VPCC stands for:

a) Variable portable C compiler

b) Very portable C compiler

c) Both

d) None

Answer is b) Very portable C compiler

 

Q2. ATA stands for:

a) Advance technology attachment

b) Advance teach attachment

c) Both

d) None

Answer is a) Advance technology attachment

 

Q3. In register transfer which system is a sequential logic system in which flip-flops and gates are constructed:

a) Digital system

b) Register

c) Data

d) None

Answer is a) Digital system

 

Q4. The memory bus is also referred as :

a) Data bus

b) Address bus

c) Memory bus

d) All of these

Answer is a) Data bus

 

Q5. High level language C supports register transfer technique for application:

a) Executing

b) Compiling

c) Both

d) None

Answer is a) Executing

 

Q6. The memory bus is also referred as :

a) Data bus

b) Address bus

c) Memory bus

d) All of these

Answer is a) Data bus

 

Q7. A counter is incremented by one and memory unit is considered as a collection of :

a) Transfer register

b) Storage register

c) RTL

d) All of these

Answer is b) Storage register

 

Q8. How many parts of memory bus:

a) 2

b) 3

c) 5

d) 6

Answer is a) 2

 

Q9. Which is the straight forward register transfer the data from register to another register temporarily:

a) Digital system

b) Register

c) Data

d) Register transfer operations

Answer is d) Register transfer operations

 

Q10. A three state gate defined as:

a) Analog circuit

b) Analog fundamentals

c) Both a & b

d) Digital circuit

Answer is c) Both a & b

 

Q11. In 3 state gate two states act as signals equal to:

a) Logic 0

b) Logic 1

c) None of these

d) Both a & b

Answer is d) Both a & b

 

Q12. In 3 state gate third position termed as high impedance state which acts as:

a) Open circuit

b) Close circuit

c) None of these

d) All of above

Answer is a) Open circuit

 

Q13. In every transfer, selection of register by bus is decided by:

a) Control signal

b) No signal

c) All signal

d) All of above

Ans is a) Control signal

 

Q14. Every bit of register has:

a) 2 common line

b) 3 common line

c) 1 common line

d) none of these

Ans is c) 1 common line

 

Q15. Which shift is used for signed binary number:

a) Logical

b) Arithmetic

c) Both a & b

d) None of these

Ans is b) Arithmetic

 



 

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